SM3算法硬件实现研究与应用
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TP309.7

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Research and application of SM3 hardware implementation
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    摘要:

    伴随现阶段运用SM3密码杂凑算法的应用不断增加,执行速度和实用效率越来越无法满足用户大数据量实时处理的需求。为了进一步满足大数据时代的安全需求以及提高该算法的硬件效率,本文结合SM3算法特性利用硬件描述语言Verilog对其进行高效的FPGA硬件设计,并利用Xilinx公司软件开发套件进行综合仿真验证,设计相应的接口与驱动软件。最后在ARM和FPGA联合处理平台利用我们设计的SM3完整性认证IP模块,完成对实时视频完整性验证的实际测试。与纯软件实现相同功能相比,时钟仅为100 MHz的情况下,吞吐量提升了2倍以上,大大提升了SM3算法的执行效率,解决了现阶段实时视频认证的难题。

    Abstract:

    With the increasing of SM3 password hash algorithm used at present stage, the execution speed and practical efficiency increasingly unable to meet the needs of processing large amount of data realtime of users. In order to further meet security needs of the era of big data, and improve the hardware efficiency of the SM3 algorithm, considering the feature of SM3 algorithm for efficient, we use hardware description language Verilog design FPGA hardware and integrated simulation using Xilinx software which test the design. Finally, we use the SM3 module in video data authentication on ARM and FPGA platform. Compared with the pure software which realize the same function, when clock is 100 MHz, throughput is increased more than 2 times, the execution efficiency of SM3 algorithm is greatly improved and the problem of realtime video authentication at the present stage is solved.

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周威,王博,张卫东. SM3算法硬件实现研究与应用[J].电子测量技术,2015,38(12):67-71

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  • 在线发布日期: 2016-02-29
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