In order to solve the problems of low data transmission rate of large-capacity storage devices, long-distance transmission stability, low portability of existing Gigabit Ethernet hard-core MAC controllers, poor maneuverability, and waste of resources under specific structure functions, FPGA and Physical layer chip combination method. Through the understanding of the structure and working principle of the MAC layer, a method of combining FPGA and physical layer chip is proposed to complete high-speed data transmission. Due to the FPGA implementation, the MAC controller has the characteristics of strong controllability, strong portability, small resource usage and strong adaptability. It is verified on the basis of a self-developed platform: it shows that the MAC controller is feasible and controllable.