一种将鉴频鉴相器和电荷泵分为奇偶周期的设计
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西南交通大学微电子研究所 成都 611756

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TN432

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国家自然科学基金重大项目(62090012)、国家自然科学基金重点项目(62031016,61831017)、四川省重点项目(2019YFG0498,2020YFG0282,2020YFG0452,2020YFG0028)资助


Design of phase frequency detector and charge pump with odd and even period
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Institute of Microelectronics, Southwest Jiaotong University, Chengdu 611756, China

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    摘要:

    设计了应用于锁相环系统的鉴频鉴相器和电荷泵模块,通过将采样周期分为奇偶两组,避免了复位延迟信号过大带来的交叠问题。通过数据选择器将鉴频鉴相器分为奇偶周期,电荷泵的设计采用源极开关电荷泵结构,并加入运算放大器提高电荷泵的匹配特性和输出电压范围。基于TSMC N28 nm CMOS工艺,用Spectre对电路进行仿真。仿真结果表明,电荷泵电路在输出电压为0~0.9 V时充放电电流失配度小于0.4%,在输出电压为0.45 V时充放电电流失配度仅为0.028%;鉴频鉴相器和电荷泵级联仿真的动态特性曲线具有良好的线性度,且鉴频鉴相器输入两信号同相时,电荷泵输出平均电流仅为-4.159 nA,有良好的动态匹配特性。

    Abstract:

    The design of phase frequency detector and charge pump used in the phase-locked loop system has been achieved in this paper. The sampling period is divided into odd and even to avoid the overlap problem caused by the excessive reset delay signal. The phase frequency detector is divided into odd and even period by the data selector. The structure of the source-switch charge pump is adopted, and an operational amplifier is added to the structure to improve the matching characteristics and output voltage range of the charge pump. The circuit designed by TSMC N28 nm CMOS was simulated and verified in the Spectre. The simulation results show that when the output voltage of the charge pump circuit is 0~0.9 V, the charge and discharge current mismatch is less than 0.4%, and when the output voltage is 0.45 V, the charge and discharge current mismatch is only 0.028%; the frequency detector and the dynamic characteristic curve of the charge pump cascade simulation has good linearity, and when the two input signals phase of the frequency detector are same, the average output current of the charge pump is only -4.159 nA, which has good dynamic matching characteristics.

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谭 睿,冯全源.一种将鉴频鉴相器和电荷泵分为奇偶周期的设计[J].电子测量技术,2021,44(15):97-102

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  • 在线发布日期: 2024-08-26
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