In order to meet the requirement of reliable multi-channel high-speed data transmission in space telemetry system, a four-channel data transmission design based on FPGA controller and Serial RapidIO(SRIO) protocol is proposed. Xilinx A7 series FPGA is used in the design, and four SRIO IP cores are used to design the internal logic and realize the high-speed data transmission of four-way SRIO. Use its internal integrated Gigabit transceiver (GTP) to meet the SRIO transport protocol physical layer requirements. The hardware circuit uses four high-speed receiving and luminous modules to complete the photoelectric conversion; A high quality clock chip is used to generate 125MHz differential clock signal as the reference clock of the SRIO IP core. The data transmission rate of four channels can reach 440MB/s without frame loss and error. The design has been successfully applied to a ground test platform project of telemetry system, which can realize stable transmission of four channels high-speed data.