Abstract:The hardware units of fixedpoint and floatingpoint calculation are designed and implemented after studying and improving the traditional CORDIC algorithm to calculate the elementary functions in image processing. Two micro rotation angles of CORDIC algorithm iteration are proposed to expand the definition domain of function calculation, and angle coding is used to reduce the number of iterations of trigonometric function calculation. Arc tangent and square root can be calculated in rotation mode, sine and cosine can be calculated in vector mode. The units of Fixed point and floating point are designed in pipeline structure, and the functions can be selected by mode configuration. The floatingpoint unit bases on the format of IEEE754 single precision floatingpoint number. The data path contains order matching, iteration and normalization, and can be calculated once in 24 cycles. The verification of SystemVerilog platform is realized and the worst accuracy of fixedpoint calculation is 10-3, and floating point is 10-7. The maximum working frequency of 32 bit fixedpoint calculation can reach 2439 MHz, which takes less resources than the traditional CORDIC algorithm when verificate on the FPGA. The improved fixedpoint CORDIC algorithm is applied to image edge detection based on Sobel, with clearer edges and faster imaging speed. FPGA platform for image data acquisition, processing and display system is built to complete the verification of the algorithm.