基于FPGA的道路标识检测系统设计
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1.长春理工大学机电工程学院 长春 130022; 2.长春理工大学重庆研究院 重庆 401135

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TP391

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173计划技术领域基金(B类)(2022-JCJQ-JJ-0257)、重庆市自然科学基金(2022NSCQ-MSX0340)项目资助


Design of road marking detection system based on FPGA
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1.School of Mechanical Engineering, Changchun University of Science and Technology,Changchun 130022, China; 2.Changchun University of Science and Technology Chongqing Research Institute, Chongqing 401135, China

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    摘要:

    为达到道路标识实时检测的要求,针对目前主流的目标检测算法在图像处理器上存在模型参数量大、实时性差、功耗大和成本高的问题,提出一种基于FPGA的道路标识实时检测方案。为减少参数量、提高检测速度,采用YOLOv3-tiny作为特征提取网络,进行权重参数的训练与优化;将模型浮点数参数量化为8位定点数,并将量化后的网络模型在FPGA上完成部署实验。实验结果表明,在Yolov3-tiny网络检测速率上,本系统对实验数据集的测试帧率可达到153 fps,功耗为4.92 W,峰值GOP/s为115GOP/s。该系统可以满足实时目标检测的要求,并且能够在低功耗的状态下实现系统的部署。

    Abstract:

    In order to meet the requirements of real-time detection of road signs, for the current mainstream target detection algorithms on the image processor there are a large number of model parameters, poor real-time performance, high power consumption and high cost, a real-time detection of road signs based on FPGA is proposed. In order to reduce the number of parameters and improve the detection speed, YOLOv3-tiny is used as the feature extraction network for the training and optimization of the weight parameters; the model floating-point parameters are quantized into 8-bit fixed-point numbers, and the quantized network model is used to complete the deployment experiments on the FPGA. The experimental results show that at the Yolov3-tiny network detection rate, the test frame rate of this system for the experimental dataset can reach 153 fps, the power consumption is 4.92 W, and the peak GOP/s is 115GOP/s. This system can satisfy the requirement of real-time target detection, and it can realize the deployment of the system under low power consumption.

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王新伟,丁红昌,曹国华.基于FPGA的道路标识检测系统设计[J].电子测量技术,2024,47(4):113-119

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  • 在线发布日期: 2024-05-15
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