ARINC659 bus is a standard bus of data transfer between LRMs in Avionics which can be Integerated and modulared.The strong point of ARINC659 bus are the multiple redundant structure and the TDPA method used in Frame transceiver. One difficulty of ARINC659 bus is implementing its synchronization mechanism. This paper introduced the basic content of ARINC659 bus espscially the synchronization mechanism of ARINC659 bus . Using A3P FPGA and verilog to describe the synchronization mechanism of ARINC659 bus under Libero platform and sample the singal by online debugging tool called identify. The final test results show that the system is normal and stable which is accord with the requirements of the protocol.