基于DDS时钟合成的变采样率偶发信号采样方法
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1.北京信息科技大学仪器科学与光电工程学院,北京 100192 2.航天恒星科技有限公司信息传输与处理事业部,北京 100086

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TN792

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北京市教委科技计划一般项目(KM201911232019,KM202011232008)、国家自然科学基金(51775051)、北京市自然科学基金青年基金(4214080)资助


Sampling method of variable sampling rate for occasional signal based on DDS clock synthesis
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1.School of Instrument Science and Opto-Electronics Engineering, Beijing Information Science and Technology University, Beijing 100192, China; 2. Information Transmission and Processing Division of Aerospace Star Technology Co., Ltd, Beijing 100086, China

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    摘要:

    目前信号采集技术在某些领域如金属测伤、生物医疗中,主要关注偶发信号。如果采用传统固定频率采集信号的方法会造成存储资源严重的浪费。针对这一问题,提出一种基于DDS时钟分相合成的变采样率偶发信号采样方法。该方法结合了DDS技术和波形分相合成技术,并根据信号特征自适应地切换采样频率。在保证信号信息完整性的同时,减少了无用信号的数据存储。经过仿真与实验验证结果表明,此方法在FPGA平台上很好的实现了采样率12MHz与96MHz的实时切换控制,完整还原了最高频率为10MHz的探伤检测波形细节,同时在FPGA的并行处理下利用分相合成技术提高了至少四倍采样率,优化了资源利用率。

    Abstract:

    At present, in some fields, such as metal wound detection and biomedical, the signal acquisition technology mainly focuses on occasional signal.If the traditional fixed-frequency signal acquisition method is used, it will cause a serious waste of storage resources.To solve this problem, a sampling method based on DDS clock phase synthesis is proposed.The method combines DDS technology and waveform phase synthesis technology and adaptively switches the sampling frequency according to the signal characteristics.While ensuring the integrity of signal information, the data storage of useless signals is reduced. Through simulation and experiment results show that the method on FPGA platform is well on achieving the sampling rate of 12 MHZ and 96 MHZ real-time switching control, a complete reduction of the highest frequency of 10 MHZ waveform detection details, at the same time under the parallel processing of the FPGA using split phase synthesis by sampling rate of at least four times, optimize the resource utilization.

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郝思聪,贺 庆,李晓曦.基于DDS时钟合成的变采样率偶发信号采样方法[J].电子测量技术,2021,44(21):108-112

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  • 在线发布日期: 2024-07-08
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