一种低功耗CMOS晶体振荡器电路设计
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南京邮电大学集成电路科学与工程学院 南京 210023

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TN432

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A low-power CMOS crystal oscillator circuit design
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College of Integrated Circuit Science and Engineering, Nanjing University of Posts and Telecommunications,Nanjing 210023, China

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    摘要:

    晶体振荡器作为时钟电路的重要组成部分,是时钟电路中功耗最大的模块,针对传统晶体振荡器功耗过大的问题,根据晶体振荡器起振和停振情况下输出电压信号平均值的特性,提出了一种能够获得振荡器维持振荡状态所需的最小电流的方法,大大降低了晶体振荡器电路的功耗。基于28 nm CMOS工艺设计了一种皮尔斯振荡电路。仿真实验结果表明,在1.8 V电源电压下,电路能够在200 ms内快速起振,振荡频率为32.768 kHz,输出时钟信号稳定后振荡器的工作电流仅为270 nA。

    Abstract:

    As an important part of the clock circuit, the crystal oscillator is the module with the largest power consumption in the clock circuit, in view of the problem of excessive power consumption of the traditional crystal oscillator, according to the characteristics of the average value of the output voltage signal in the case of starting and stopping the crystal oscillator, a method is proposed to obtain the minimum current required for the oscillator to maintain the oscillation state, which greatly reduces the power consumption of the crystal oscillator circuit. A Pierce oscillation circuit was designed based on the 28 nm CMOS process. The simulation results showed that at a supply voltage of 1.8 V, the circuit can start up quickly within 200 ms, the oscillation frequency is 32.768 kHz, and the oscillator operates at only 270 nA after the output clock signal is stable.

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李宜书,陈德媛,张瑛.一种低功耗CMOS晶体振荡器电路设计[J].电子测量技术,2023,46(3):1-5

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  • 在线发布日期: 2024-02-26
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