基于28nm MOSFET集成RNVM的1T1R纳米阵列器件可靠性研究
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1.浙江经济职业技术学院汽车技术学院 杭州 310018; 2.浙江理工大学机械工程学院 杭州 310018; 3.浙江大学信息与电子工程学院 杭州 310027

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TN306;TB34

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国家自然科学基金(61704152)项目资助


Research on the reliability of 1T1R nano-device in array integrated RNVM with 28 nm MOSFET
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1.College of Automotive Technology, Zhejiang Technical Institute of Economics, Hangzhou 310018, China; 2.College of Mechanical Engineering, Zhejiang SciTech University, Hangzhou 310018, China; 3.College of Information Science & Electronic Engineering, Zhejiang University, Hangzhou 310027, China

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    摘要:

    针对下一代新型纳米电子器件应用可靠性,设计制备了基于28 nm CMOS工艺MOSFET有源集成RNVM的存算一体化1T1R纳米阵列器件,测试评价了其在开关比(107-8)、操作电压(±1 V)、存储窗口等方面的综合电学性能,并设计实施了专门的可靠性试验。结果表明1T1R纳米阵列器件存在MOSFET Ion、Ileak应力退化-44.90%、751.64%以及RRAM循环耐受过程反向硬击穿等不单独出现于分立器件的特有失效现象。分析微观器件物理,得出1T1R纳米阵列器件因其独特结构特征和操作模式下复杂微观交互机制引发高源漏电压和弱栅控条件下特有可靠性原理的结论。提出了专门测试调控方案以提高1T1R纳米阵列器件可靠性。为解决28 nm及以下节点CMOS逻辑器件集成纳米RNVM技术引发的特有可靠性问题提供参考。

    Abstract:

    Aiming at the application reliability of the next generation of new electronic nano-devices, the storage-computing 1T1R nano-devices in array actively integrated RNVM with MOSFET based on the 28 nm CMOS process were designed and fabricated, and its comprehensive electrical performances were tested and evaluated in terms of switching ratio(107-8), operating voltage(±1 V), storage windows and so on. The specific reliability experiments were designed and implemented. The results indicated that the unique failure phenomena which did not occur separately in discrete devices truly existed in 1T1R nano-devices in array including the Ion/Ileak degradation (-44.90%/751.64%) of MOSFET in stress and the reverse hard-breakdown of RRAM during cycling tolerance. Taking the microscopic physics mechanism of nano-device into account, the conclusions were summarized that the unique reliability principles triggered by high source-drain voltage and weak gate-control conditions were attributed to the complex micro interaction mechanisms due to its unique structural features and operating modes of 1T1R nano-devices in array. The pertinently specialized test regulation schemes were proposed to improve the reliability of 1T1R nano-devices in array. References for resolving the unique reliability issues caused by the integration of RNVM nanotechnology with logic devices at 28 nm CMOS nodes and below were provided.

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徐顺,陈冰.基于28nm MOSFET集成RNVM的1T1R纳米阵列器件可靠性研究[J].电子测量技术,2024,47(14):18-25

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  • 在线发布日期: 2024-11-22
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