The network traffic analysis system is an important technology that ensures the security of cyberspace. The traditional analysis system is difficult to deal with the massive amount of data. It is urgent for a specific technology to pre-filter the network data packets in order to reduce the burden of the analysis system. Considering the need, this paper designs a 160 Gbit/s network packets filtering system based on FPGA. The system first parses the input network data packets, extracts the keywords, and then uses a hash table to lookup. A round-robin arbiter is designed for the multi-channel query. Finally, filter and output the packets that meet the requirements. System-level simulation and board-level test results show that the average delay during processing is 1.5us, and the effective filtering ratio is over 99.5%, which meets the requirement of 16*10 Gbit/s line-rate filtering. On the XC7VX485T FPGA, RAM resources occupy less than 80% when supporting 40960 keywords queries. The system is high-throughput, low-latency, and high-reliability. It is practical and has great value in network security fields such as backbone networks and data centers.