Aiming at the problem of increased power consumption and reduced reliability of DDS chips due to large storage space overhead, a ROM storage space compression optimization for direct digital frequency synthesis (DDS) waveform generators on field programmable gate arrays (FPGA) was designed. algorithm. Under the premise of not changing the waveform precision, the ROM is compressed by storing the relative increment of the amplitude sequence to reduce the waveform data bit width, and then the amplitude accumulator can be used to restore the real amplitude sequence. Build the project in the Quartus II 13.0 development environment and pass the test on the FPGA development board. After testing, the DDS signal generator can generate five different waveforms, occupying a total of 9240bit storage space. The results show that this DDS optimization algorithm saves more than 96% of resources compared with the traditional DDS waveform generator, which can reduce the system power consumption and improve the system running speed.